Re: [Qemu-devel] implementation of Vmul instruction in QEMU that seems to be illogical

2010-12-06 Thread Paul Brook
> Logically, implementation of Vmull.s32 and vmul.u32 is just similar to the > 8 and 16 bit cases. For example: > case 4: gen_helper_neon_mull_s32(dest, a, b); break; > case 5: gen_helper_neon_mull_u32(dest, a, b); break; > I implemented in this way and tested. It is OK. So I can't understa

[Qemu-devel] implementation of Vmul instruction in QEMU that seems to be illogical

2010-12-05 Thread vandung . tran
The implementation of QEMU 0.12.5 is as below: static inline void gen_neon_mull(TCGv_i64 dest, TCGv a, TCGv b, int size, int u) { TCGv_i64 tmp; switch ((size << 1) | u) { case 0: gen_helper_neon_mull_s8(dest, a, b); break; case 1: gen_helper_neon_mull_u8(dest, a, b); break; ca