Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-10-02 Thread Emilio G. Cota
On Tue, Oct 02, 2018 at 07:48:20 +0100, Alex Bennée wrote: > > Emilio G. Cota writes: > > > On Thu, Sep 20, 2018 at 01:19:51 +0100, Alex Bennée wrote: > >> If we are going to have an indirection then we can also drop the > >> requirement to scale the TLB according to the number of MMU indexes we

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-10-01 Thread Alex Bennée
Emilio G. Cota writes: > On Thu, Sep 20, 2018 at 01:19:51 +0100, Alex Bennée wrote: >> If we are going to have an indirection then we can also drop the >> requirement to scale the TLB according to the number of MMU indexes we >> have to support. It's fairly wasteful when a bunch of them are alm

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-10-01 Thread Emilio G. Cota
On Mon, Oct 01, 2018 at 15:40:37 -0500, Richard Henderson wrote: > On 10/1/18 1:34 PM, Emilio G. Cota wrote: > > On Thu, Sep 20, 2018 at 01:19:51 +0100, Alex Bennée wrote: > >> If we are going to have an indirection then we can also drop the > >> requirement to scale the TLB according to the number

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-10-01 Thread Richard Henderson
On 10/1/18 1:34 PM, Emilio G. Cota wrote: > On Thu, Sep 20, 2018 at 01:19:51 +0100, Alex Bennée wrote: >> If we are going to have an indirection then we can also drop the >> requirement to scale the TLB according to the number of MMU indexes we >> have to support. It's fairly wasteful when a bunch

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-10-01 Thread Emilio G. Cota
On Thu, Sep 20, 2018 at 01:19:51 +0100, Alex Bennée wrote: > If we are going to have an indirection then we can also drop the > requirement to scale the TLB according to the number of MMU indexes we > have to support. It's fairly wasteful when a bunch of them are almost > never used unless you are

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-22 Thread Richard Henderson
On 9/19/18 10:54 AM, Emilio G. Cota wrote: > I've been thinking about ways to increase softmmu performance > by speeding up TLB accesses. > > Last year, Pranith proposed to increase the size of the TLBs: > https://patchwork.kernel.org/patch/9927793/ > The problem with that approach is that it sl

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-21 Thread Emilio G. Cota
On Wed, Sep 19, 2018 at 17:23:29 -0700, Peter Maydell wrote: > On 19 September 2018 at 17:19, Alex Bennée wrote: > >> An additional improvement that I have thought of is to get rid > >> of memset(-1) altogether. Instead, we'd store addresses in the TLB > >> as $real_address+1, so that 0xff..ff is

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-19 Thread Peter Maydell
On 19 September 2018 at 17:19, Alex Bennée wrote: >> An additional improvement that I have thought of is to get rid >> of memset(-1) altogether. Instead, we'd store addresses in the TLB >> as $real_address+1, so that 0xff..ff is stored as 0x00..00. That way, >> instead of malloc+memset we'd just c

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-19 Thread Alex Bennée
Emilio G. Cota writes: > I've been thinking about ways to increase softmmu performance > by speeding up TLB accesses. > > Last year, Pranith proposed to increase the size of the TLBs: > https://patchwork.kernel.org/patch/9927793/ > The problem with that approach is that it slows down flushes

[Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-19 Thread Emilio G. Cota
I've been thinking about ways to increase softmmu performance by speeding up TLB accesses. Last year, Pranith proposed to increase the size of the TLBs: https://patchwork.kernel.org/patch/9927793/ The problem with that approach is that it slows down flushes significantly, since they have to mems