ubject: RE: [Qemu-devel] icount mode
Hi Alex,
Thanks for your reply.
For the different frequencies, please see below code in armv7m_systick.c and
mps2.c first, the s->reload will be set by the guest os code according to the
CPU's frequency which will be SYSCLK_FRQ, and s->tick wi
=4,align=off,sleep=off -rtc clock=vm) give very different accuracy for
guest timer. So my question is how to calculate the shift value for the end
user.
Thanks again for your help.
Thanks
-Original Message-
From: Qemu-devel [mailto:qemu-devel-bounces+wentong.wu=intel....@nongnu.org] On
Wu, Wentong writes:
> Hi all,
>
> Recently I'm using Qemu TCG icount mode, from the code I found Qemu
> timers run at 1GHz, and for ArmV7M example, there will be conversion
Are you talking about:
#define ARM_CPU_FREQ 10 /* FIXME: 1 GHz, should be configurable */
because as far as I
Hi all,
Recently I'm using Qemu TCG icount mode, from the code I found Qemu timers run
at 1GHz, and for ArmV7M example, there will be conversion factor from qemu
timer to SysTick frequency which will be calculated by NANOSECONDS_PER_SECOND /
SYSCLK_FRQ.
But the shift value also define the targe
