one more question. I was going through this code here. the lines in bold
are what happened when the second operand of the operation is a memory
location. what is the IS_DEAD_ARG(1), is the register allocator doing some
liveness analysis here ?
static void tcg_reg_alloc_mov(TCGContext *s, const TC
Thank you very much. This is very helpful.
Xin
On Sun, Nov 27, 2011 at 6:33 PM, Peter Maydell wrote:
> On 27 November 2011 23:07, Xin Tong wrote:
>> can you please show me where the (120) is used. we pushed a global
>> TCGV to the gen_opparam_ptr. lets say the backend is i386 and the
>> operat
On 27 November 2011 23:07, Xin Tong wrote:
> can you please show me where the (120) is used. we pushed a global
> TCGV to the gen_opparam_ptr. lets say the backend is i386 and the
> operation is an add.
So, you can find it like this:
(1) starting from tcg_global_mem_new_i64 we follow where that
can you please show me where the (120) is used. we pushed a global
TCGV to the gen_opparam_ptr. lets say the backend is i386 and the
operation is an add.
Thanks
Xin
On Sun, Nov 27, 2011 at 3:59 PM, Peter Maydell wrote:
> On 27 November 2011 16:17, Xin Tong wrote:
>> So the offset value (120)
On 27 November 2011 16:17, Xin Tong wrote:
> So the offset value (120) is really encapsulated in the TCGv
> structure. and when we need the offset, we just call GET_TCGV_IA64
> like what it is doing here
>
> static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64
> arg2,
>
So the offset value (120) is really encapsulated in the TCGv
structure. and when we need the offset, we just call GET_TCGV_IA64
like what it is doing here
static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 arg1, TCGv_i64 arg2,
TCGv_i64 arg3)
{
*gen_o
Am 27.11.2011 16:23, schrieb Xin Tong:
> This is a bit confusing then
>
> in target-i386/translate.c
>
> void optimize_flags_init(void)
> {
> ...
> cpu_regs[15] = tcg_global_mem_new_i64(TCG_AREG0,
> offsetof(CPUState, regs[15]),
> "r15");
> printf(
On 27 November 2011 15:23, Xin Tong wrote:
> cpu_regs[15] = tcg_global_mem_new_i64(TCG_AREG0,
> offsetof(CPUState, regs[15]), "r15");
> printf("offsetof(CPUState, regs[15]) is %ld\n", offsetof(CPUState,
> regs[15]));
> output is cpu_regs[15] is 20, offs
This is a bit confusing then
in target-i386/translate.c
void optimize_flags_init(void)
{
...
cpu_regs[15] = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUState, regs[15]), "r15");
printf("offsetof(CPUState, regs[15]) is %ld\n", offsetof(CPUState, re
Am 27.11.2011 15:36, schrieb Xin Tong:
> If i understand correctly here, those are just array of offsets for
> the emulated registers such that the tcg can easily get access to the
> address of the emulated registers. This is, however, different from
> the env (CPUx86State) variable which will alwa
If i understand correctly here, those are just array of offsets for
the emulated registers such that the tcg can easily get access to the
address of the emulated registers. This is, however, different from
the env (CPUx86State) variable which will always have a host register
pointing to it ( host r
Am 27.11.2011 14:46, schrieb Xin Tong:
> When the x86 vcpu is initialized, a CPUX86State is qemu_mallocz'ed.
> env is used to point to it and modifications to the CPUX86State can
> thereby be done via the register that contains the env. I do not get
> what the cpu_regs[CPU_NB_REGS] are for, do not
When the x86 vcpu is initialized, a CPUX86State is qemu_mallocz'ed.
env is used to point to it and modifications to the CPUX86State can
thereby be done via the register that contains the env. I do not get
what the cpu_regs[CPU_NB_REGS] are for, do not we already have a set
of emulated x86 registers
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