Thanks a lot! The problem was with using dead temporaries. The ts->val_type
assertion failed because the value of val_type for these instructions was
TEMP_VAL_DEAD.
Deep
On Mar 16, 2013, at 5:44 AM, Peter Maydell wrote:
> On 15 March 2013 18:59, Soumyadeep Ghosh
> wrote:
>>int label
On 15 March 2013 18:59, Soumyadeep Ghosh wrote:
> int label_rn = gen_new_label();
> int label_done = gen_new_label();
> tcg_gen_brcond_tl (TCG_cond_LT, tmp2, tmp, label_rn); // If tmp2
> < tmp, branch to label_rn
> store_reg (s, 20, tmp2);
Hi,
I am trying to modify the translate.c file for ARM target to add some extra
operations for every add/subtract instruction in the target code. Following are
the main modifications I need to make:
1. Added new registers to CPUArmState and added corresponding TCG registers
(already done)
2. F
