You're confusing pci bus address with physical address.
BAR is pci bus address.
On Sat, Jul 03, 2010 at 12:11:58PM +0800, chen huacai wrote:
> I have some doubts: when newcfg=0, Qemu Monitor shows
> BAR6: 32bit memory at 0x0400 [0x0400]
> Does this means the physical address 0x0400 isn
I have some doubts: when newcfg=0, Qemu Monitor shows
BAR6: 32bit memory at 0x0400 [0x0400]
Does this means the physical address 0x0400 isn't in RAM but in PCI memory?
If yes, seems like it will cause problems.
If no, how to understand the output of "info pci" in Qemu Monitor?
On Fri,
Thank you the pointer. I found the followings.
https://groups.google.com/group/archlinux-for-loongson/web/loongson
https://groups.google.com/group/archlinux-for-loongson/web/bonito64-spec.pdf
Am I referring to a correct spec?
According to it,
[0x, 0x1000) RAM
[0x1000, 0x1400)
Maybe this is what you want, please look at Page 10.
http://people.openrays.org/~comcat/godson/doc/godson2e.north.bridge.manual.pdf
But it is written in Chinese, I'm sorry that I also don't have an
English version.
On Wed, Jun 30, 2010 at 9:38 PM, Isaku Yamahata wrote:
> Can you elaborate on how
Can you elaborate on how pci bus is mapped into local bus?
Is there specification publicly available? Google didn't tell me.
On Wed, Jun 30, 2010 at 06:39:53PM +0800, Huacai Chen wrote:
> It seems like software may both use CPU address or PCI address to access a PCI
> device. For example, Bonito
