> I have some questions about PCIe operations sssuming the device has MMIO
> handlers involved (as shown above).
> 1. Will all PCIe config operations
> ALWAYS use the installed config handlers? Or can PCIe config operations
> use the MMIO handlers?
Access to PCI config space is provided by the P
Hello,
I have a question regarding how Qemu PCIe devices handle Config Transactions vs
Memory Transactions (assuming the PCI device is setup to act as
PCI_BASE_ADDRESS_SPACE_MEMORY).
I'm using portions of hw/cirrus_vga.c to make my point,
static PCIDeviceInfo cirrus_vga_info = {
.qdev
