Re: [Qemu-devel] Intel X86 hardware transactional memory

2015-02-06 Thread Peter Maydell
On 5 February 2015 at 05:09, Patrick Williams III wrote: > Consider two virtual addresses that point to the same physical address. One > thread uses the first virtual address in a transaction; another thread > writes to the second virtual address while the transaction is going on. > This should c

Re: [Qemu-devel] Intel X86 hardware transactional memory

2015-02-05 Thread Richard Henderson
On 02/05/2015 07:36 PM, Xin Tong wrote: > I agree conflict detection should be down on physical addresses. we do > have physical addresses in the softmmu helpers. On a side note, is > there a plan to be provide a set of functionalities in QEMU to make > implementing transactional memory easier ? N

Re: [Qemu-devel] Intel X86 hardware transactional memory

2015-02-05 Thread Xin Tong
On Thu, Feb 5, 2015 at 5:52 PM, Richard Henderson wrote: > On 02/04/2015 09:09 PM, Patrick Williams III wrote: >>>I think one possible way is to clear the software tlb on entry to the >>>transaction and disable (not install any translations) the software >>>TLB till the end of the transaction. >>>

Re: [Qemu-devel] Intel X86 hardware transactional memory

2015-02-05 Thread Richard Henderson
On 02/04/2015 09:09 PM, Patrick Williams III wrote: >>I think one possible way is to clear the software tlb on entry to the >>transaction and disable (not install any translations) the software >>TLB till the end of the transaction. >>In the softmmu helper functions, the memory addresses as well a

Re: [Qemu-devel] Intel X86 hardware transactional memory

2015-02-04 Thread Patrick Williams III
er Firmware Development, Bldg 045-2/C034512-286-6369, T/L: 363-6369iawil...@us.ibm.com-qemu-devel-bounces+iawillia=us.ibm@nongnu.org wrote: ->To: QEMU Developers >From: Xin Tong >Sent by: qemu-devel-bounces+iawillia=us.ibm@nongnu.org>Date: 02/04/2015 08:21PM>Su

[Qemu-devel] Intel X86 hardware transactional memory

2015-02-04 Thread Xin Tong
If i want to implement Intel X86 hardware transactional memory (HTM) in QEMU. what would be a good way to track the memory accesses. I think one possible way is to clear the software tlb on entry to the transaction and disable (not install any translations) the software TLB till the end of the tra