On Mon, 2014-06-23 at 10:45 +1000, Benjamin Herrenschmidt wrote:
>
> Another option would be to use an unused bit if the ENABLE register
> and simply force it to 1 on reads when the endian control register
> is present... though in this case it might be a better idea to use
> that bit to indicate
On Mon, 2014-06-16 at 20:30 +1000, Benjamin Herrenschmidt wrote:
> Hi !
>
> So while trying to solve an issue we have with qemu/kvm and powerpc who
> can be both LE and BE nowadays, we thought the ideal solution would be
> to have a register in the emulated VGA to control the endian.
No reply ..
On Mon, 2014-06-16 at 20:30 +1000, Benjamin Herrenschmidt wrote:
> Hi !
>
> So while trying to solve an issue we have with qemu/kvm and powerpc who
> can be both LE and BE nowadays, we thought the ideal solution would be
> to have a register in the emulated VGA to control the endian.
No reply ...
On Mon, 2014-06-16 at 11:45 +0100, Peter Maydell wrote:
> On 16 June 2014 11:30, Benjamin Herrenschmidt
> wrote:
> > So while trying to solve an issue we have with qemu/kvm and powerpc who
> > can be both LE and BE nowadays, we thought the ideal solution would be
> > to have a register in the emu
On 16 June 2014 11:30, Benjamin Herrenschmidt wrote:
> So while trying to solve an issue we have with qemu/kvm and powerpc who
> can be both LE and BE nowadays, we thought the ideal solution would be
> to have a register in the emulated VGA to control the endian.
> Any suggestion ? Comment ? Flam
Hi !
So while trying to solve an issue we have with qemu/kvm and powerpc who
can be both LE and BE nowadays, we thought the ideal solution would be
to have a register in the emulated VGA to control the endian.
Since qemu wishes to remain as much as possible in sync / compatible
with Bochs, I'm po
