On Mon, May 28, 2018 at 3:26 PM, Stefan Hajnoczi wrote:
> Tasks:
>
> D3.3 Instruction Support
> D3.5.1 Alignment support
Julia and I have discussed these two tasks and she will work on them.
I will implement an undefined instruction test case that verifies that
all undefined instructions do inde
On Thu, Jun 07, 2018 at 06:46:26AM -0400, Liviu Ionescu wrote:
> On 7 June 2018 at 13:36:30, Stefan Hajnoczi (stefa...@gmail.com) wrote:
>
> > If you do want to upstream the code you linked, please let us know
> > the
> > details of how you want to do it and how long it might take. Maybe
> > there
On 7 June 2018 at 13:36:30, Stefan Hajnoczi (stefa...@gmail.com) wrote:
> If you do want to upstream the code you linked, please let us know
> the
> details of how you want to do it and how long it might take. Maybe
> there is a way to work together on it...
yes, I considered this, but I do not h
Oops, I meant Outreachy internship instead of Google Summer of Code.
Stefan
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On Mon, Jun 04, 2018 at 07:15:01AM -0400, Liviu Ionescu wrote:
> On 4 June 2018 at 14:10:08, Stefan Hajnoczi (stefa...@gmail.com) wrote:
>
> > What is the status of the Cortex M0 in that source tree? Is it complete?
>
> all supported Cortex-M devices run blinky demos using the official
> CMSIS in
On 4 June 2018 at 14:10:08, Stefan Hajnoczi (stefa...@gmail.com) wrote:
> What is the status of the Cortex M0 in that source tree? Is it complete?
all supported Cortex-M devices run blinky demos using the official
CMSIS initialisations, but I would not qualify them as complete.
they also include
On Sun, Jun 3, 2018 at 2:14 PM, Liviu Ionescu wrote:
> On 2 June 2018 at 17:15:15, Stefan Hajnoczi (stefa...@gmail.com) wrote:
>
>> > I have put together a basic Cortex M0 ARMv6-M CPU that can serve
>> as
>> the basis for this work. Please see the RFC patches that I've sent
>> separately.
>
> you
On 2 June 2018 at 17:15:15, Stefan Hajnoczi (stefa...@gmail.com) wrote:
> > I have put together a basic Cortex M0 ARMv6-M CPU that can serve
> as
> the basis for this work. Please see the RFC patches that I've sent
> separately.
you can also take a look at the Cortex-M implementation in the GNU M
On Mon, May 28, 2018 at 3:26 PM, Stefan Hajnoczi wrote:
> Before we can tackle these tasks a Cortex M0 CPU needs to be defined.
> Adding the Cortex M0 involves a new element in
> target/arm/cpu.c:arm_cpus[]. The CPU needs ARM_FEATURE_V6 and
> ARM_FEATURE_M. Once that is in place most of these ta
On Tue, May 29, 2018 at 07:09:20PM +0100, Peter Maydell wrote:
> On 28 May 2018 at 15:26, Stefan Hajnoczi wrote:
> > Hi,
> > I took a look at what's required for ARM Cortex M0 emulation that we
> > need for the micro:bit ARM board. The following notes are based on
> > Appendix D3 of the ARMv6-M A
On 28 May 2018 at 15:26, Stefan Hajnoczi wrote:
> Hi,
> I took a look at what's required for ARM Cortex M0 emulation that we
> need for the micro:bit ARM board. The following notes are based on
> Appendix D3 of the ARMv6-M Architecture Reference Manual that Peter
> Maydell recommended.
>
> Severa
Hi,
I took a look at what's required for ARM Cortex M0 emulation that we
need for the micro:bit ARM board. The following notes are based on
Appendix D3 of the ARMv6-M Architecture Reference Manual that Peter
Maydell recommended.
Several people can work on this since there are many smaller tasks.
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