Re: [Qemu-devel] ARM PC-relative Loads, and TBs in soft MMU

2016-04-25 Thread Tom Spink
On 23/04/16 13:21, Peter Maydell wrote: TBs are looked up by (virtual) PC + flags + physical address, so if the same lump of code is mapped at two different virtual addresses we'll translate it twice. (More precisely, tb_find_fast() checks only the virtual address, but it does so in a cache which

Re: [Qemu-devel] ARM PC-relative Loads, and TBs in soft MMU

2016-04-23 Thread Peter Maydell
On 22 April 2016 at 16:06, Tom Spink wrote: > So, my question is, how can a TB for a particular block containing a > constant folded *virtual* PC work, if the MMU mappings change and a > different virtual address is used to access the same physical address? > > E.g. assume we have an instruction s

[Qemu-devel] ARM PC-relative Loads, and TBs in soft MMU

2016-04-22 Thread Tom Spink
Hello, I have a question about ARM PC-relative load instructions in softmmu execution, and how the PC is constant-folded at JIT compilation time into a TB. I have observed in translate.c the following code: /* Set a variable to the value of a CPU register. */ static void load_reg_var(DisasC