On 08/12/2014 03:45 AM, Tom Musta wrote:
> +#else
> tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
> cpu_gpr[rB(ctx->opcode)]);
> tcg_gen_ext32s_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)]);
> +#endif
Note that the sign-extension can be d
For 64-bit implementations, the mullw result is the 64 bit product
of the sign-extended least significant 32 bits of the source
registers.
Fix the code to properly sign extend the source operands and produce
a 64 bit product.
Example:
R3 002F37A0
R4 41C33D242F816715
mullw 3,3,4
R3 expecte
