On Wed, 16 Apr 2014 15:29:35 +0200
Eric Auger wrote:
> On 04/11/2014 03:34 AM, Kim Phillips wrote:
> > On Wed, 9 Apr 2014 16:33:07 +0100
> > Eric Auger wrote:
> >> @@ -108,12 +108,13 @@ static const MemMapEntry a15memmap[] = {
> >> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each
On 04/11/2014 03:34 AM, Kim Phillips wrote:
> On Wed, 9 Apr 2014 16:33:07 +0100
> Eric Auger wrote:
>
>> This work is inspired of PCI INTx. The code was prepared to support
>> multiple IRQs but this was not tested at that stage. Similarly to what
>> is done on PCI, the device register space is RA
On Wed, 9 Apr 2014 16:33:07 +0100
Eric Auger wrote:
> This work is inspired of PCI INTx. The code was prepared to support
> multiple IRQs but this was not tested at that stage. Similarly to what
> is done on PCI, the device register space is RAM unmapped on IRQ hit
> in order to trap the end of i
This work is inspired of PCI INTx. The code was prepared to support
multiple IRQs but this was not tested at that stage. Similarly to what
is done on PCI, the device register space is RAM unmapped on IRQ hit
in order to trap the end of interrupt (EOI). On mmap timer hit, if the
EOI was trapped, the
