On 11/15/18 11:34 PM, Alistair Francis wrote:
> +#define TCG_TARGET_HAS_extrl_i64_i320
> +#define TCG_TARGET_HAS_extrh_i64_i320
You need these two for rv64 to preserve the invariant that 32-bit values are
sign-extended in a 64-bit register. Otherwise _i32 comparisons won't work
reliably.
On 11/15/18 11:34 PM, Alistair Francis wrote:
> +#define TCG_TARGET_HAS_add2_i32 0
> +#define TCG_TARGET_HAS_sub2_i32 0
You're not allowed to not implement this for riscv-32,
along with brcond2 and setcond2.
> +#define TCG_TARGET_HAS_movcond_i32 0
The architecture manual sug
Signed-off-by: Alistair Francis
Signed-off-by: Michael Clark
---
tcg/riscv/tcg-target.h | 173 +
1 file changed, 173 insertions(+)
create mode 100644 tcg/riscv/tcg-target.h
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
new file mode 100644
