Re: [Qemu-devel] [RFC PATCH v0] softfloat: Add round-to-odd rounding mode

2017-01-20 Thread Bharata B Rao
On Thu, Jan 19, 2017 at 07:29:54AM -0800, Richard Henderson wrote: > On 01/18/2017 09:14 PM, Bharata B Rao wrote: > > Power ISA 3.0 introduces a few quadruple precision floating point > > instructions that support round-to-add rounding mode. The > > round-to-odd mode is explained as under: > > > >

Re: [Qemu-devel] [RFC PATCH v0] softfloat: Add round-to-odd rounding mode

2017-01-19 Thread Peter Maydell
On 19 January 2017 at 15:29, Richard Henderson wrote: > The description in see in the manual on page 387 is more precise than what > you quote above: > > # If IR is exact, choose IR. > # Otherwise choose NL, and if Guard=1, Round=1 or Sticky=1, > # the least significant bit of the result is

Re: [Qemu-devel] [RFC PATCH v0] softfloat: Add round-to-odd rounding mode

2017-01-19 Thread Peter Maydell
On 19 January 2017 at 14:47, Eric Blake wrote: > On 01/18/2017 11:14 PM, Bharata B Rao wrote: >> round-to-odd mode is explained as under: >> >> Let Z be the intermediate arithmetic result or the operand of a convert >> operation. If Z can be represented exactly in the target format, the >> result

Re: [Qemu-devel] [RFC PATCH v0] softfloat: Add round-to-odd rounding mode

2017-01-19 Thread Richard Henderson
On 01/18/2017 09:14 PM, Bharata B Rao wrote: Power ISA 3.0 introduces a few quadruple precision floating point instructions that support round-to-add rounding mode. The round-to-odd mode is explained as under: Let Z be the intermediate arithmetic result or the operand of a convert operation. If

Re: [Qemu-devel] [RFC PATCH v0] softfloat: Add round-to-odd rounding mode

2017-01-19 Thread Eric Blake
On 01/18/2017 11:14 PM, Bharata B Rao wrote: > Power ISA 3.0 introduces a few quadruple precision floating point > instructions that support round-to-add rounding mode. The s/add/odd/ > round-to-odd mode is explained as under: > > Let Z be the intermediate arithmetic result or the operand of a c

Re: [Qemu-devel] [RFC PATCH v0] softfloat: Add round-to-odd rounding mode

2017-01-19 Thread Peter Maydell
On 19 January 2017 at 05:14, Bharata B Rao wrote: > Power ISA 3.0 introduces a few quadruple precision floating point > instructions that support round-to-add rounding mode. The > round-to-odd mode is explained as under: > > Let Z be the intermediate arithmetic result or the operand of a convert >

[Qemu-devel] [RFC PATCH v0] softfloat: Add round-to-odd rounding mode

2017-01-18 Thread Bharata B Rao
Power ISA 3.0 introduces a few quadruple precision floating point instructions that support round-to-add rounding mode. The round-to-odd mode is explained as under: Let Z be the intermediate arithmetic result or the operand of a convert operation. If Z can be represented exactly in the target form