alvise rigo writes:
> I'm going to respin these patches soon, I've found some issues that
> I'm addressing now.
Thanks, please feel free to add me to your CC list.
>
> Thank you for your feedback,
> alvise
>
> On Tue, May 26, 2015 at 11:51 PM, Emilio G. Cota wrote:
>> On Mon, May 11, 2015 at
I'm going to respin these patches soon, I've found some issues that
I'm addressing now.
Thank you for your feedback,
alvise
On Tue, May 26, 2015 at 11:51 PM, Emilio G. Cota wrote:
> On Mon, May 11, 2015 at 11:10:05 +0200, alvise rigo wrote:
>> the last commit was b8df9208f357d2b36e1b19634aea9736
On Mon, May 11, 2015 at 11:10:05 +0200, alvise rigo wrote:
> the last commit was b8df9208f357d2b36e1b19634aea973618dc7ba8.
Thanks.
Unfortunately a segfault still happens very early:
$ gdb arm-softmmu/qemu-system-arm
GNU gdb (Ubuntu/Linaro 7.4-2012.04-0ubuntu2.1) 7.4-2012.04
Copyright (C) 2012 Fr
On Fri, May 8, 2015 at 8:29 PM, Emilio G. Cota wrote:
> On Wed, May 06, 2015 at 17:38:02 +0200, Alvise Rigo wrote:
>> This patch series provides an infrastructure for atomic
>> instruction implementation in QEMU, paving the way for TCG multi-threading.
>> The adopted design does not rely on host a
Hi,
On Fri, May 8, 2015 at 5:22 PM, Alex Bennée wrote:
>
> Alvise Rigo writes:
>
>> This patch series provides an infrastructure for atomic
>> instruction implementation in QEMU, paving the way for TCG multi-threading.
>> The adopted design does not rely on host atomic
>> instructions and is int
On Wed, May 06, 2015 at 17:38:02 +0200, Alvise Rigo wrote:
> This patch series provides an infrastructure for atomic
> instruction implementation in QEMU, paving the way for TCG multi-threading.
> The adopted design does not rely on host atomic
> instructions and is intended to propose a 'legacy' s
Alvise Rigo writes:
> This patch series provides an infrastructure for atomic
> instruction implementation in QEMU, paving the way for TCG multi-threading.
> The adopted design does not rely on host atomic
> instructions and is intended to propose a 'legacy' solution for
> translating guest atom
Hi Mark,
Firstly, thank you for your feedback.
On Wed, May 6, 2015 at 5:55 PM, Mark Burton wrote:
> A massive thank you for doing this work Alvise,
>
> On our side, the patch we suggested is only applicable for ARM, though the
> mechanism would work for any CPU,
> - BUT
> It doesn’t for
> On 6 May 2015, at 18:19, alvise rigo wrote:
>
> Hi Mark,
>
> Firstly, thank you for your feedback.
>
> On Wed, May 6, 2015 at 5:55 PM, Mark Burton wrote:
>> A massive thank you for doing this work Alvise,
>>
>> On our side, the patch we suggested is only applicable for ARM, though the
>>
On Wed, May 6, 2015 at 6:00 PM, Mark Burton wrote:
> By the way - would it help to send the atomic patch we did separately from
> the whole MTTCG patch set?
I don't think you should spend time on this. As you said it's short, I
can do it by myself when necessary.
Thank you,
alvise
> Or have yo
By the way - would it help to send the atomic patch we did separately from the
whole MTTCG patch set?
Or have you already taken a look at that - it’s pretty short.
Cheers
Mark.
> On 6 May 2015, at 17:51, Paolo Bonzini wrote:
>
> On 06/05/2015 17:38, Alvise Rigo wrote:
>> This patch series pr
A massive thank you for doing this work Alvise,
On our side, the patch we suggested is only applicable for ARM, though the
mechanism would work for any CPU,
- BUT
It doesn’t force atomic instructions out through the slow path. This is either
a very good thing (it’s much faster), or a ve
On 06/05/2015 17:38, Alvise Rigo wrote:
> This patch series provides an infrastructure for atomic
> instruction implementation in QEMU, paving the way for TCG multi-threading.
> The adopted design does not rely on host atomic
> instructions and is intended to propose a 'legacy' solution for
> trans
This patch series provides an infrastructure for atomic
instruction implementation in QEMU, paving the way for TCG multi-threading.
The adopted design does not rely on host atomic
instructions and is intended to propose a 'legacy' solution for
translating guest atomic instructions.
The underlying
14 matches
Mail list logo
