On 09/02/2013 04:42 PM, Aurelien Jarno wrote:
> On Wed, Aug 28, 2013 at 08:26:43AM -0700, Richard Henderson wrote:
>> (1) I want explicit _i32 and _i64 sizes for the loads and stores. This will
>> clean up a number of places in several translators where we have to load to
>> _tl
>> and then trunc
On Wed, Aug 28, 2013 at 08:26:43AM -0700, Richard Henderson wrote:
> On 08/28/2013 07:34 AM, Peter Maydell wrote:
> > On 28 August 2013 15:31, Richard Henderson wrote:
> >> On 08/28/2013 01:15 AM, Peter Maydell wrote:
> >>> [*] not impossible, we already do something on the ppc
> >>> that's simila
On 08/28/2013 01:42 PM, Edgar E. Iglesias wrote:
> A question, some archs have an endian swap
> controlled via the MMU, e.g per page selectable (some PPC, microblaze and
> maybe others). AFAIK the behaviour is implementable in QEMU today but not
> very efficiently. Any thoughts/ideas on this?
The
On 28 August 2013 21:42, Edgar E. Iglesias wrote:
> I like what you propose aswell. A question, some archs have an endian swap
> controlled via the MMU, e.g per page selectable
It seems to be a rule that no matter how weird a concept in CPU architecture,
some CPU designer will have implemented a
On Wed, Aug 28, 2013 at 08:26:43AM -0700, Richard Henderson wrote:
> On 08/28/2013 07:34 AM, Peter Maydell wrote:
> > On 28 August 2013 15:31, Richard Henderson wrote:
> >> On 08/28/2013 01:15 AM, Peter Maydell wrote:
> >>> [*] not impossible, we already do something on the ppc
> >>> that's simila
On 08/28/2013 10:28 AM, Peter Maydell wrote:
> Well, what do ldl_p or ldl_phys or any of the other functions
> without an le/be qualifier mean any more if "is this CPU in
> big endian mode?" now requires you to have a CPUState
> to ask? I guess we can tackle that separately from getting
> the assum
Am 28.08.2013 18:38, schrieb Peter Maydell:
> On 28 August 2013 16:26, Richard Henderson wrote:
>
>> (D) Profit! I'm not sure what will be left of TARGET_WORDS_BIGENDIAN at this
>> point. Possibly only if we leave the current translator interface in place
>> in
>> step A.
> I think there are a
On 28 August 2013 18:16, Richard Henderson wrote:
> On 08/28/2013 09:38 AM, Peter Maydell wrote:
>>> (B) Add an additional bit to the "opc" to indicate which endianness is
>>> desired.
>>> E.g. 0 = LE, 8 = BE. Expose the opc interface to the translators. At
>>> which
>>> point generating a lo
On 08/28/2013 09:38 AM, Peter Maydell wrote:
>> (B) Add an additional bit to the "opc" to indicate which endianness is
>> desired.
>> E.g. 0 = LE, 8 = BE. Expose the opc interface to the translators. At which
>> point generating a load becomes more like
>>
>> tcg_gen_qemu_ld_tl(dest, addr,
On 28 August 2013 16:26, Richard Henderson wrote:
> On 08/28/2013 07:34 AM, Peter Maydell wrote:
>> On 28 August 2013 15:31, Richard Henderson wrote:
>>> On 08/28/2013 01:15 AM, Peter Maydell wrote:
[*] not impossible, we already do something on the ppc
that's similar; however I'd reall
On 08/28/2013 07:34 AM, Peter Maydell wrote:
> On 28 August 2013 15:31, Richard Henderson wrote:
>> On 08/28/2013 01:15 AM, Peter Maydell wrote:
>>> [*] not impossible, we already do something on the ppc
>>> that's similar; however I'd really want to take the time to
>>> figure out how to do endia
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