On 15/05/2015 17:12, Christoffer Dall wrote:
>>> > > Can you find out what memory attributes the guest is using for the
>>> > > memory---and if it's uncached, why?
>> >
>> > For USB, see "drivers/usb/core/hcd-pci.c", function usb_hcd_pci_probe():
>> > it uses ioremap_nocache().
>> >
>> > On the
On Fri, May 15, 2015 at 01:43:57PM +0200, Laszlo Ersek wrote:
> On 05/07/15 19:01, Paolo Bonzini wrote:
> >
> >
> > On 07/05/2015 18:56, Jérémy Fanguède wrote:
> >> USB devices fail with a timeout error, as if the communication between
> >> the kernel and the devices fail at a certain point:
> >>
On 05/07/15 19:01, Paolo Bonzini wrote:
>
>
> On 07/05/2015 18:56, Jérémy Fanguède wrote:
>> USB devices fail with a timeout error, as if the communication between
>> the kernel and the devices fail at a certain point:
>> usb 1-1: device not accepting address 5, error -110
>> usb usb1-port1: unab
On 07/05/2015 18:56, Jérémy Fanguède wrote:
> USB devices fail with a timeout error, as if the communication between
> the kernel and the devices fail at a certain point:
> usb 1-1: device not accepting address 5, error -110
> usb usb1-port1: unable to enumerate USB device
>
> e1000 fails when t
On Thu, May 7, 2015 at 5:34 PM, Christoffer Dall
wrote:
> On Thu, May 7, 2015 at 4:50 PM, Jérémy Fanguède
> wrote:
>> On Thu, May 7, 2015 at 1:20 PM, Christoffer Dall
>> wrote:
>>> On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
On Wed, May 6, 2015 at 4:12 PM, Christoffer D
On Thu, May 7, 2015 at 4:50 PM, Jérémy Fanguède
wrote:
> On Thu, May 7, 2015 at 1:20 PM, Christoffer Dall
> wrote:
>> On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
>>> On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
>>> wrote:
>>> > Hi Jérémy,
>>> >
>>> > On Tue, May 05, 2015
On Thu, May 7, 2015 at 1:20 PM, Christoffer Dall
wrote:
> On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
>> On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
>> wrote:
>> > Hi Jérémy,
>> >
>> > On Tue, May 05, 2015 at 11:13:11AM +0200, Jérémy Fanguède wrote:
>> >> To maintain cac
On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
> On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
> wrote:
> > Hi Jérémy,
> >
> > On Tue, May 05, 2015 at 11:13:11AM +0200, Jérémy Fanguède wrote:
> >> To maintain cache coherency on ARM, we may need a mechanism to flush
> >> the da
On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
wrote:
> Hi Jérémy,
>
> On Tue, May 05, 2015 at 11:13:11AM +0200, Jérémy Fanguède wrote:
>> To maintain cache coherency on ARM, we may need a mechanism to flush
>> the data cache.
>
> In addition to generally just making this functionality available
Hi Jérémy,
On Tue, May 05, 2015 at 11:13:11AM +0200, Jérémy Fanguède wrote:
> To maintain cache coherency on ARM, we may need a mechanism to flush
> the data cache.
In addition to generally just making this functionality available (see
below), do you have an actual use case in mind for this? To
To maintain cache coherency on ARM, we may need a mechanism to flush
the data cache.
This patch implements KVM_FLUSH_DCACHE_GPA vm ioctl which flushes the
data cache at a specified address range. The input argument is a
struct kvm_mem_addr containing the guest physical address and the
length.
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