[Qemu-devel] [PULL 22/34] RISC-V: Add support for the Zicsr extension

2019-06-28 Thread Palmer Dabbelt
The various CSR instructions have been split out of the base ISA as part of the ratification process. This patch adds a Zicsr argument, which disables all the CSR instructions. Signed-off-by: Palmer Dabbelt Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 1 + target/riscv/cpu.h | 1 + t

[Qemu-devel] [PULL 22/34] RISC-V: Add support for the Zicsr extension

2019-06-27 Thread Palmer Dabbelt
The various CSR instructions have been split out of the base ISA as part of the ratification process. This patch adds a Zicsr argument, which disables all the CSR instructions. Signed-off-by: Palmer Dabbelt Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 1 + target/riscv/cpu.h | 1 + t