Fixed in v9 as well as all other misordered instances added.
On 31 October 2014 08:35, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > Use MVBAR register as exception vector base address for
> > exceptions taken to CPU monitor mode.
> >
> >
From: Fabian Aggeler
Use MVBAR register as exception vector base address for
exceptions taken to CPU monitor mode.
Signed-off-by: Sergey Fedorov
Signed-off-by: Fabian Aggeler
Signed-off-by: Greg Bellows
---
v7 -> v8
- Changed the mvbar cp15 storage from uint64_t to uint32_t
---
target-arm/
On 30 October 2014 21:28, Greg Bellows wrote:
> From: Fabian Aggeler
>
> Use MVBAR register as exception vector base address for
> exceptions taken to CPU monitor mode.
>
> Signed-off-by: Sergey Fedorov
> Signed-off-by: Fabian Aggeler
> Signed-off-by: Greg Bellows
If you put the cp/opc fields
