On 03/12/2014 11:22 AM, Sebastian Huber wrote:
> Hello Fabien,
>
> On 2014-03-12 11:17, Fabien Chouteau wrote:
>> Thanks Sebastian, I will try my first pull request :)
>
> I think Mark already did this
>
> http://lists.gnu.org/archive/html/qemu-devel/2014-03/msg02325.html
>
> ?
Very well then
Hello Fabien,
On 2014-03-12 11:17, Fabien Chouteau wrote:
Thanks Sebastian, I will try my first pull request :)
I think Mark already did this
http://lists.gnu.org/archive/html/qemu-devel/2014-03/msg02325.html
?
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchh
Thanks Sebastian, I will try my first pull request :)
Thanks Sebastian, I will try my first pull request ;)
v5: Fix two typos. Generate an IU instead of FPU exception in case CASA is not
supported by the CPU. Define CASA feature for all SPARC64 CPUs (due to the
#ifndef TARGET_SPARC64 it must go into the #else branch).
v6: Move CHECK_IU_FEATURE(dc, CASA); in #ifndef TARGET_SPARC64 block since
SPARC64 has
The LEON3 processor has support for the CASA instruction which is
normally only available for SPARC V9 processors. Binutils 2.24
and GCC 4.9 will support this instruction for LEON3. GCC uses it to
generate C11 atomic operations.
The CAS synthetic instruction uses an ASI of 0x80. If TARGET_SPARC
