On 03/31/2014 06:52 PM, Alexey Kardashevskiy wrote:
> On Sat, Aug 3, 2013 at 2:30 AM, Vincenzo Maffione wrote:
>
>> This patch partially implements the e1000 interrupt mitigation mechanisms.
>> Using a single QEMUTimer, it emulates the ITR register (which is the newer
>> mitigation register, recom
On Sat, Aug 3, 2013 at 2:30 AM, Vincenzo Maffione wrote:
> This patch partially implements the e1000 interrupt mitigation mechanisms.
> Using a single QEMUTimer, it emulates the ITR register (which is the newer
> mitigation register, recommended by Intel) and approximately emulates
> RADV and TADV
Thank you guys for your support!
Best regards,
Vincenzo
2013/8/6 Stefan Hajnoczi :
> On Fri, Aug 02, 2013 at 06:30:52PM +0200, Vincenzo Maffione wrote:
>> This patch partially implements the e1000 interrupt mitigation mechanisms.
>> Using a single QEMUTimer, it emulates the ITR register (which
On Fri, Aug 02, 2013 at 06:30:52PM +0200, Vincenzo Maffione wrote:
> This patch partially implements the e1000 interrupt mitigation mechanisms.
> Using a single QEMUTimer, it emulates the ITR register (which is the newer
> mitigation register, recommended by Intel) and approximately emulates
> RADV
Am 05.08.2013 11:27, schrieb Stefan Hajnoczi:
> On Fri, Aug 02, 2013 at 06:30:52PM +0200, Vincenzo Maffione wrote:
>> This patch partially implements the e1000 interrupt mitigation mechanisms.
>> Using a single QEMUTimer, it emulates the ITR register (which is the newer
>> mitigation register, reco
On Fri, Aug 02, 2013 at 06:30:52PM +0200, Vincenzo Maffione wrote:
> This patch partially implements the e1000 interrupt mitigation mechanisms.
> Using a single QEMUTimer, it emulates the ITR register (which is the newer
> mitigation register, recommended by Intel) and approximately emulates
> RADV
On Fri, Aug 02, 2013 at 06:30:52PM +0200, Vincenzo Maffione wrote:
> This patch partially implements the e1000 interrupt mitigation mechanisms.
> Using a single QEMUTimer, it emulates the ITR register (which is the newer
> mitigation register, recommended by Intel) and approximately emulates
> RADV
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulate
