On Wed, Sep 21, 2016 at 01:49:10PM +1000, David Gibson wrote:
> On Tue, Sep 20, 2016 at 03:28:08PM +0800, Peter Xu wrote:
> > On Tue, Sep 20, 2016 at 04:14:09PM +1000, David Gibson wrote:
> > > On Wed, Sep 14, 2016 at 04:25:48PM +0800, Peter Xu wrote:
> > > > Intel vIOMMU is still lacking of a comp
On Tue, Sep 20, 2016 at 03:28:08PM +0800, Peter Xu wrote:
> On Tue, Sep 20, 2016 at 04:14:09PM +1000, David Gibson wrote:
> > On Wed, Sep 14, 2016 at 04:25:48PM +0800, Peter Xu wrote:
> > > Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
> > > Before that is achieved, let's op
On Tue, Sep 20, 2016 at 04:14:09PM +1000, David Gibson wrote:
> On Wed, Sep 14, 2016 at 04:25:48PM +0800, Peter Xu wrote:
> > Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
> > Before that is achieved, let's open a door for vhost DMAR support, which
> > only requires cache in
On Wed, Sep 14, 2016 at 04:25:48PM +0800, Peter Xu wrote:
> Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
> Before that is achieved, let's open a door for vhost DMAR support, which
> only requires cache invalidations (UNMAP operations).
>
> Meanwhile, converting hw_error()
Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
Before that is achieved, let's open a door for vhost DMAR support, which
only requires cache invalidations (UNMAP operations).
Meanwhile, converting hw_error() to error_report() and exit(1), to make
the error messages clean and
