On 7 October 2014 22:50, Greg Bellows wrote:
> I'm still trying to wrap my head around it, but I believe there are
> cases where we use a different register set depending on whether a
> given EL is 32 or 64-bit.
Well, if an EL is 64-bit then it sees (effectively) a totally
different register set
On 7 October 2014 02:12, Peter Maydell wrote:
> On 7 October 2014 06:06, Greg Bellows wrote:
> >
> >
> > On 6 October 2014 11:19, Peter Maydell wrote:
> >>
> >> On 30 September 2014 22:49, Greg Bellows
> wrote:
> >> > From: Fabian Aggeler
> >> >
> >> > Prepare ARMCPRegInfo to support specifyi
On 7 October 2014 06:06, Greg Bellows wrote:
>
>
> On 6 October 2014 11:19, Peter Maydell wrote:
>>
>> On 30 September 2014 22:49, Greg Bellows wrote:
>> > From: Fabian Aggeler
>> >
>> > Prepare ARMCPRegInfo to support specifying two fieldoffsets per
>> > register definition. This will allow us
On 6 October 2014 11:19, Peter Maydell wrote:
> On 30 September 2014 22:49, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > Prepare ARMCPRegInfo to support specifying two fieldoffsets per
> > register definition. This will allow us to keep one register
> > definition for banked registers (
On 30 September 2014 22:49, Greg Bellows wrote:
> From: Fabian Aggeler
>
> Prepare ARMCPRegInfo to support specifying two fieldoffsets per
> register definition. This will allow us to keep one register
> definition for banked registers (different offsets for secure/
> non-secure world).
>
> Signe
From: Fabian Aggeler
Prepare ARMCPRegInfo to support specifying two fieldoffsets per
register definition. This will allow us to keep one register
definition for banked registers (different offsets for secure/
non-secure world).
Signed-off-by: Fabian Aggeler
Signed-off-by: Greg Bellows
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