On 05/21/2015 02:47 AM, Yongbok Kim wrote:
> On 20/05/2015 18:25, Richard Henderson wrote:
>
>>
>>> +int i; \
>>> +for (i = 0; i < DF_ELEMENTS(DF); i++) { \
>>> +wx.TYPE[i] = LD_INSN(env, addr
On 20/05/2015 18:25, Richard Henderson wrote:
>
>> +int i; \
>> +for (i = 0; i < DF_ELEMENTS(DF); i++) { \
>> +wx.TYPE[i] = LD_INSN(env, addr + (i << DF), ##__VA_ARGS__); \
>
> Why the va
On 05/20/2015 08:12 AM, Yongbok Kim wrote:
> +#define MSA_LD_DF(DF, TYPE, LD_INSN, ...) \
> +void helper_msa_ld_ ## TYPE(CPUMIPSState *env, uint32_t wd, uint32_t rs,\
> + int32_t s10) \
> +{
MIPS SIMD Architecture vector loads and stores require misalignment support.
MSA Memory access should work as an atomic operation. Therefore, it has to
check validity of all addresses for a vector store access if it is spanning
into two pages.
Separating helper functions for each data format as fo
