Re: [Qemu-devel] [PATCH v4] target-m68k: add rol/ror/roxl/roxr instructions

2016-11-27 Thread Laurent Vivier
Le 11/11/2016 à 22:25, Laurent Vivier a écrit : > --- a/target-m68k/translate.c > +++ b/target-m68k/translate.c > +DISAS_INSN(rotate16_im) > +{ > +int left = (insn & 0x100); > +TCGv reg; > +TCGv shift; > +int tmp; > + > +reg = gen_extend(DREG(insn, 0), OS_WORD, 0); > +tmp =

Re: [Qemu-devel] [PATCH v4] target-m68k: add rol/ror/roxl/roxr instructions

2016-11-12 Thread Laurent Vivier
Le 12/11/2016 à 09:26, Richard Henderson a écrit : > On 11/11/2016 10:25 PM, Laurent Vivier wrote: >> Signed-off-by: Laurent Vivier >> --- >> v4: >> - don't overwrite TCGv descriptor in rotate16_reg() >> v3: >> - fix rotate memory decoding >> - use "shx = shx < 0 ? size : shx;" >> - some clean

Re: [Qemu-devel] [PATCH v4] target-m68k: add rol/ror/roxl/roxr instructions

2016-11-12 Thread Richard Henderson
On 11/11/2016 10:25 PM, Laurent Vivier wrote: Signed-off-by: Laurent Vivier --- v4: - don't overwrite TCGv descriptor in rotate16_reg() v3: - fix rotate memory decoding - use "shx = shx < 0 ? size : shx;" - some cleanup v2: - use shift to do rotate_x() for 8 and 16bit value - rotate_x()/ro

[Qemu-devel] [PATCH v4] target-m68k: add rol/ror/roxl/roxr instructions

2016-11-11 Thread Laurent Vivier
Signed-off-by: Laurent Vivier --- v4: - don't overwrite TCGv descriptor in rotate16_reg() v3: - fix rotate memory decoding - use "shx = shx < 0 ? size : shx;" - some cleanup v2: - use shift to do rotate_x() for 8 and 16bit value - rotate_x()/rotate32_x() are a no-op when shift % (size + 1)