On 06/23/2016 12:18 PM, Richard Henderson wrote:
On 06/23/2016 11:16 AM, Sergey Sorokin wrote:
+#if defined(CONFIG_SOFTMMU)
+/**
+ * get_alignment_bits
+ * @memop: TCGMemOp value
+ *
+ * Extract the alignment size from the memop.
+ *
+ * Returns: 0 in case of byte access (which is always aligned
On 06/23/2016 11:16 AM, Sergey Sorokin wrote:
+#if defined(CONFIG_SOFTMMU)
+/**
+ * get_alignment_bits
+ * @memop: TCGMemOp value
+ *
+ * Extract the alignment size from the memop.
+ *
+ * Returns: 0 in case of byte access (which is always aligned);
+ * positive value - number of alignme
Some architectures (e.g. ARMv8) need the address which is aligned
to a size more than the size of the memory access.
To support such check it's enough the current costless alignment
check implementation in QEMU, but we need to support
an alignment size specifying.
Signed-off-by: Sergey Sorokin
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