Re: [Qemu-devel] [PATCH v3 23/31] target-arm: Implement AArch64 view of CPACR

2014-02-25 Thread Peter Crosthwaite
On Sun, Feb 16, 2014 at 2:07 AM, Peter Maydell wrote: > Implement the AArch64 view of the CPACR. The AArch64 > CPACR is defined to have a lot of RES0 bits, but since > the architecture defines that RES0 bits may be implemented > as reads-as-written and we know that a v8 CPU will have > no register

[Qemu-devel] [PATCH v3 23/31] target-arm: Implement AArch64 view of CPACR

2014-02-15 Thread Peter Maydell
Implement the AArch64 view of the CPACR. The AArch64 CPACR is defined to have a lot of RES0 bits, but since the architecture defines that RES0 bits may be implemented as reads-as-written and we know that a v8 CPU will have no registered coprocessors for cp0..cp13 we can safely implement the whole r