On 11/27/2016 11:42 PM, Jin Guojie wrote:
By reading Richard and Aurelien's comment, I realized now the best way to solve
this problem
is not to add ext32s in brcond_32i, but to fix the helper function. In another
word,
the register value should be 32-bit sign-extened at where it's being *creat
Here I can describe the problem when patch 11 is not applied.
When booting Linux kernel with qemu-system-i386 on mips64el host, the
guest CPU enters infinite loop:
0xc01f3b90: cmp0x14(%esp),%esi
0xc01f3b94: jae0xc01f3b99
qemu_ld_i32 tmp1,tmp2,leul,2
mov_i32 tmp0,esi
mov_i32 cc_src,
On 2016-11-25 13:06, Richard Henderson wrote:
> On 11/25/2016 04:31 AM, Jin Guojie wrote:
> > 32-bit condition functions(like brcond_i32) should only
> > compare the low half parts of two 64-bit host registers.
> > However, MIPS64 does not have distinct instruction for
> > such operation. The opera
On 11/25/2016 04:31 AM, Jin Guojie wrote:
32-bit condition functions(like brcond_i32) should only
compare the low half parts of two 64-bit host registers.
However, MIPS64 does not have distinct instruction for
such operation. The operands should be sign extended
to fit the case.
Gcc handles 32-b
32-bit condition functions(like brcond_i32) should only
compare the low half parts of two 64-bit host registers.
However, MIPS64 does not have distinct instruction for
such operation. The operands should be sign extended
to fit the case.
Gcc handles 32-bit comparison in the same way, as the
follow
