Re: [Qemu-devel] [PATCH v3 04/15] target-mips: add RI and XI fields to TLB entry

On 24/10/2014 13:42, Leon Alrae wrote: In Revision 3 of the architecture, the RI and XI bits were added to the TLB to enable more secure access of memory pages. These bits (along with the Dirty bit) allow the implementation of read-only, write-only, no-execute access policies for mapped pages. S

[Qemu-devel] [PATCH v3 04/15] target-mips: add RI and XI fields to TLB entry

In Revision 3 of the architecture, the RI and XI bits were added to the TLB to enable more secure access of memory pages. These bits (along with the Dirty bit) allow the implementation of read-only, write-only, no-execute access policies for mapped pages. Signed-off-by: Leon Alrae --- target-mip