That seems like a good plan to separate these tasks. I will implement this in
the next patchset. Thank you
-Original Message-
From: Aleksandar Markovic
Sent: Thursday, August 30, 2018 8:40 AM
To: Janeczek, Craig ; qemu-devel@nongnu.org
Cc: aurel...@aurel32.net; Petar Jovanovic ; Richard
Hi, Craig,
> From: Craig Janeczek
> Sent: Tuesday, August 28, 2018 3:00 PM
>
> Subject: [PATCH v3 0/8] Add limited MXU instruction support
>
> This patch set begins to add MXU instruction support for mips emulation.
Based on the info I have, I think a reasonable approach to integration of this
> From: Craig Janeczek
> Sent: Tuesday, August 28, 2018 3:00 PM
>
> Subject: [PATCH v3 0/8] Add limited MXU instruction support
>
> This patch set begins to add MXU instruction support for mips emulation.
Craig,
May I ask you what is the exact platform (CPU/board) that you are targeting
with th
This patch set begins to add MXU instruction support for mips
emulation.
Craig Janeczek (8):
target/mips: Introduce MXU registers
target/mips: Add all MXU opcodes
target/mips: Add MXU instructions S32I2M and S32M2I
target/mips: Add MXU instruction S8LDD
target/mips: Add MXU instruction D
