Hi Eduardo,
On 2016/9/6 2:53, Eduardo Habkost wrote:
> On Fri, Sep 02, 2016 at 10:22:55AM +0800, Longpeng(Mike) wrote:
> [...]
>> ---
>> Changes since v2:
>> - add more useful commit mesage.
>> - rename "compat-cache" to "l3-cache-shared".
>
> What exactly "shared" means here? All the proper
On Fri, Sep 02, 2016 at 10:22:55AM +0800, Longpeng(Mike) wrote:
[...]
> ---
> Changes since v2:
> - add more useful commit mesage.
> - rename "compat-cache" to "l3-cache-shared".
What exactly "shared" means here? All the property does is to
enable/disable the L3 cache, as its own description s
Hi Michael,
On 2016/9/3 6:52, Michael S. Tsirkin wrote:
> On Fri, Sep 02, 2016 at 10:22:55AM +0800, Longpeng(Mike) wrote:
>> From: "Longpeng(Mike)"
>>
>> Some software algorithms are based on the hardware's cache info, for example,
>> for x86 linux kernel, when cpu1 want to wakeup a task on cpu2
On Fri, Sep 02, 2016 at 10:22:55AM +0800, Longpeng(Mike) wrote:
> From: "Longpeng(Mike)"
>
> Some software algorithms are based on the hardware's cache info, for example,
> for x86 linux kernel, when cpu1 want to wakeup a task on cpu2, cpu1 will
> trigger
> a resched IPI and told cpu2 to do the
> -Original Message-
> From: longpeng
> Sent: Friday, September 02, 2016 10:23 AM
> To: ehabk...@redhat.com; r...@twiddle.net; pbonz...@redhat.com;
> m...@redhat.com
> Cc: Zhaoshenglong; Gonglei (Arei); Huangpeng (Peter); Herongguang (Stephen);
> qemu-devel@nongnu.org; Longpeng(Mike)
> Subj
From: "Longpeng(Mike)"
Some software algorithms are based on the hardware's cache info, for example,
for x86 linux kernel, when cpu1 want to wakeup a task on cpu2, cpu1 will trigger
a resched IPI and told cpu2 to do the wakeup if they don't share low level
cache. Oppositely, cpu1 will access cpu2
