Re: [Qemu-devel] [PATCH v2 4/9] target-mips: add RI and XI fields to TLB entry

2014-10-24 Thread Yongbok Kim
On 24/10/2014 15:16, Leon Alrae wrote: On 15/10/2014 13:24, Yongbok Kim wrote: On 08/07/2014 08:57, Leon Alrae wrote: In Revision 3 of the architecture, the RI and XI bits were added to the TLB to enable more secure access of memory pages. These bits (along with the Dirty bit) allow the impleme

Re: [Qemu-devel] [PATCH v2 4/9] target-mips: add RI and XI fields to TLB entry

2014-10-24 Thread Leon Alrae
On 15/10/2014 13:24, Yongbok Kim wrote: > > On 08/07/2014 08:57, Leon Alrae wrote: >> In Revision 3 of the architecture, the RI and XI bits were added to >> the TLB >> to enable more secure access of memory pages. These bits (along with >> the Dirty >> bit) allow the implementation of read-only, w

Re: [Qemu-devel] [PATCH v2 4/9] target-mips: add RI and XI fields to TLB entry

2014-10-15 Thread Yongbok Kim
On 08/07/2014 08:57, Leon Alrae wrote: In Revision 3 of the architecture, the RI and XI bits were added to the TLB to enable more secure access of memory pages. These bits (along with the Dirty bit) allow the implementation of read-only, write-only, no-execute access policies for mapped pages.

[Qemu-devel] [PATCH v2 4/9] target-mips: add RI and XI fields to TLB entry

2014-07-08 Thread Leon Alrae
In Revision 3 of the architecture, the RI and XI bits were added to the TLB to enable more secure access of memory pages. These bits (along with the Dirty bit) allow the implementation of read-only, write-only, no-execute access policies for mapped pages. Signed-off-by: Leon Alrae --- target-mip