Re: [Qemu-devel] [PATCH v2 4/6] hw: Model of Primecell pl35x mem controller

2012-10-22 Thread Peter Crosthwaite
On Tue, Oct 23, 2012 at 2:12 AM, Peter Maydell wrote: > On 22 October 2012 08:19, Peter Crosthwaite > wrote: >> Initial device model for the pl35x series of memory controllers. The SRAM >> interface is just implemented as a passthrough using memory regions. NAND >> interfaces are modelled. >> >>

Re: [Qemu-devel] [PATCH v2 4/6] hw: Model of Primecell pl35x mem controller

2012-10-22 Thread Peter Maydell
On 22 October 2012 08:19, Peter Crosthwaite wrote: > Initial device model for the pl35x series of memory controllers. The SRAM > interface is just implemented as a passthrough using memory regions. NAND > interfaces are modelled. > > Signed-off-by: Peter Crosthwaite > --- > changed since v1: > us

[Qemu-devel] [PATCH v2 4/6] hw: Model of Primecell pl35x mem controller

2012-10-22 Thread Peter Crosthwaite
Initial device model for the pl35x series of memory controllers. The SRAM interface is just implemented as a passthrough using memory regions. NAND interfaces are modelled. Signed-off-by: Peter Crosthwaite --- changed since v1: use sysbus_mmio_get_region() for SRAM mappings (PMM Review) fixed hea