Re: [Qemu-devel] [PATCH v2 4/4] target-tricore: Add instructions of RCR opcode format

2014-11-19 Thread Bastian Koppelmann
On 11/14/2014 01:39 PM, Richard Henderson wrote: On 11/13/2014 06:12 PM, Bastian Koppelmann wrote: +tcg_gen_ext_i32_i64(t3, r3); +tcg_gen_concat_i32_i64(t2, r2_low, r2_high); +/* extend the sign for r2 to high 64 bits */ +tcg_gen_sari_i64(t4, t2, 63); +tcg_gen_ext_i32_i64(t1

Re: [Qemu-devel] [PATCH v2 4/4] target-tricore: Add instructions of RCR opcode format

2014-11-14 Thread Richard Henderson
On 11/13/2014 06:12 PM, Bastian Koppelmann wrote: > +tcg_gen_ext_i32_i64(t3, r3); > +tcg_gen_concat_i32_i64(t2, r2_low, r2_high); > +/* extend the sign for r2 to high 64 bits */ > +tcg_gen_sari_i64(t4, t2, 63); > +tcg_gen_ext_i32_i64(t1, r1); > + > +tcg_gen_muls2_i64(t1, t3,

[Qemu-devel] [PATCH v2 4/4] target-tricore: Add instructions of RCR opcode format

2014-11-13 Thread Bastian Koppelmann
Add instructions of RCR opcode format. Add helper for madd32/64_ssov and madd32/64_suov. Add helper for msub32/64_ssov and msub32/64_suov. Add microcode generator function madd/msub for 32bit and 64bit, which calculate a mul and a add/sub. OPC2_32_RCR_MSUB_U_32 -> OPC2_32_RCR_MSUB_U_32. Signed-of