Re: [Qemu-devel] [PATCH v2 3/8] target-i386: fix set of registers zeroed on reset

2014-05-12 Thread Andreas Färber
Am 02.05.2014 16:33, schrieb Paolo Bonzini: > BND0-3, BNDCFGU, BNDCFGS, BNDSTATUS were not zeroed on reset, but they > should be (Intel Instruction Set Extensions Programming Reference > 319433-015, pages 9-4 and 9-6). Same for YMM. > > XCR0 should be reset to 1. > > TSC and TSC_RESET were zeroe

[Qemu-devel] [PATCH v2 3/8] target-i386: fix set of registers zeroed on reset

2014-05-02 Thread Paolo Bonzini
BND0-3, BNDCFGU, BNDCFGS, BNDSTATUS were not zeroed on reset, but they should be (Intel Instruction Set Extensions Programming Reference 319433-015, pages 9-4 and 9-6). Same for YMM. XCR0 should be reset to 1. TSC and TSC_RESET were zeroed already by the memset, remove the explicit assignments.