Re: [Qemu-devel] [PATCH v2 3/3] target-m68k: add cas/cas2 ops

2016-11-03 Thread Richard Henderson
On 11/03/2016 12:03 PM, Laurent Vivier wrote: CC_OP_CMPW for cas2w. It was working because I have used helper_be_ldsw_mmu() to load values, is it better to use helper_be_lduw_mmu with CC_OP_CMPW? IIRC, one needs the extra sign-extension here: case CC_OP_CMPB:

Re: [Qemu-devel] [PATCH v2 3/3] target-m68k: add cas/cas2 ops

2016-11-03 Thread Laurent Vivier
Le 03/11/2016 à 17:36, Richard Henderson a écrit : > On 11/02/2016 03:15 PM, Laurent Vivier wrote: >> +if (c1 != l1) { >> +env->cc_n = l1; >> +env->cc_v = c1; >> +} else { >> +env->cc_n = l2; >> +env->cc_v = c2; >> +} >> +env->cc_op = CC_OP_CMPL; >> +

Re: [Qemu-devel] [PATCH v2 3/3] target-m68k: add cas/cas2 ops

2016-11-03 Thread Richard Henderson
On 11/02/2016 03:15 PM, Laurent Vivier wrote: +if (c1 != l1) { +env->cc_n = l1; +env->cc_v = c1; +} else { +env->cc_n = l2; +env->cc_v = c2; +} +env->cc_op = CC_OP_CMPL; +env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1); +env->dregs[D

[Qemu-devel] [PATCH v2 3/3] target-m68k: add cas/cas2 ops

2016-11-02 Thread Laurent Vivier
Implement CAS using cmpxchg. Implement CAS2 using helper and either cmpxchg when the 32bit addresses are consecutive, or with parallel_cpus+cpu_loop_exit_atomic() otherwise. Suggested-by: Richard Henderson Signed-off-by: Laurent Vivier --- target-m68k/helper.h| 2 + target-m68k/op_helper.