On Sat, Feb 1, 2014 at 1:45 AM, Peter Maydell wrote:
> Implement the AArch64 TCR_EL1, which is the 64 bit view of
> the AArch32 TTBCR. (The uses of the bits in the register are
> completely different, but in any given situation the CPU will
> always interpret them one way or the other. In fact for
Implement the AArch64 TCR_EL1, which is the 64 bit view of
the AArch32 TTBCR. (The uses of the bits in the register are
completely different, but in any given situation the CPU will
always interpret them one way or the other. In fact for QEMU EL1
is always 64 bit, but we share the state field becau
