Re: [Qemu-devel] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable

2017-10-13 Thread Stafford Horne
On Fri, Oct 13, 2017 at 06:58:21AM -0700, Richard Henderson wrote: > On 10/13/2017 06:49 AM, Stafford Horne wrote: > > Previously coreid and numcores were hard coded as 0 and 1 respectively > > as OpenRISC QEMU did not have multicore support. > > > > Multicore support is now being added so these r

Re: [Qemu-devel] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable

2017-10-13 Thread Richard Henderson
On 10/13/2017 06:49 AM, Stafford Horne wrote: > Previously coreid and numcores were hard coded as 0 and 1 respectively > as OpenRISC QEMU did not have multicore support. > > Multicore support is now being added so these registers need to have > configured values. > > Signed-off-by: Stafford Horne

[Qemu-devel] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable

2017-10-13 Thread Stafford Horne
Previously coreid and numcores were hard coded as 0 and 1 respectively as OpenRISC QEMU did not have multicore support. Multicore support is now being added so these registers need to have configured values. Signed-off-by: Stafford Horne --- target/openrisc/sys_helper.c | 5 +++-- 1 file change