On Sun, Jan 5, 2014 at 5:58 AM, Peter Maydell wrote:
> On 2 January 2014 01:51, Peter Crosthwaite
> wrote:
>> On Mon, Dec 23, 2013 at 8:49 AM, Peter Maydell
>> wrote:
>>> +#define ARM_CP_STATE_AA32 0
>>> +#define ARM_CP_STATE_AA64 1
>>> +#define ARM_CP_STATE_BOTH 2
>>
>> You iterator below dep
On 2 January 2014 01:51, Peter Crosthwaite wrote:
> On Mon, Dec 23, 2013 at 8:49 AM, Peter Maydell
> wrote:
>> +#define ARM_CP_STATE_AA32 0
>> +#define ARM_CP_STATE_AA64 1
>> +#define ARM_CP_STATE_BOTH 2
>
> You iterator below depends on this specific encoding ordering, so
> maybe this should be
On 2 January 2014 01:51, Peter Crosthwaite wrote:
> On Mon, Dec 23, 2013 at 8:49 AM, Peter Maydell
> wrote:
>> +/* Valid values for ARMCPRegInfo state field, indicating which of
>> + * the AArch32 and AArch64 execution states this register is visible in.
>> + * If the reginfo doesn't explicitly
On Mon, Dec 23, 2013 at 8:49 AM, Peter Maydell wrote:
> Update the generic cpreg support code to also handle AArch64:
> AArch64-visible registers coexist in the same hash table with
> AArch32-visible ones, with a bit in the hash key distinguishing
> them.
>
> Signed-off-by: Peter Maydell
> ---
>
Update the generic cpreg support code to also handle AArch64:
AArch64-visible registers coexist in the same hash table with
AArch32-visible ones, with a bit in the hash key distinguishing
them.
Signed-off-by: Peter Maydell
---
target-arm/cpu.h| 74 +++---
tar
