On 04/11/2017 04:23 AM, David Gibson wrote:
> On Mon, Apr 10, 2017 at 03:56:51PM +0200, Cédric Le Goater wrote:
>> From: Benjamin Herrenschmidt
>>
>> It adds the Naples chip which supports proper LPC interrupts via the
>> LPC controller rather than via an external CPLD.
>>
>> Signed-off-by: Benjam
On Mon, Apr 10, 2017 at 03:56:51PM +0200, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt
>
> It adds the Naples chip which supports proper LPC interrupts via the
> LPC controller rather than via an external CPLD.
>
> Signed-off-by: Benjamin Herrenschmidt
> [clg: - updated for qemu-2.9
>
From: Benjamin Herrenschmidt
It adds the Naples chip which supports proper LPC interrupts via the
LPC controller rather than via an external CPLD.
Signed-off-by: Benjamin Herrenschmidt
[clg: - updated for qemu-2.9
- ported on latest PowerNV patchset
- moved the IRQ handler in pnv_lp