On 5/6/19 4:47 PM, Philippe Mathieu-Daudé wrote:
> Hi Cédric,
>
> On 5/6/19 4:20 PM, Cédric Le Goater wrote:
>> This will simplify the definition of new SoCs, like the AST2600 which
>> should use a different CPU and a different IRQ number layout.
>>
>> Signed-off-by: Cédric Le Goater
>> ---
>>
>>
On Mon, 6 May 2019 at 14:21, Cédric Le Goater wrote:
>
> This will simplify the definition of new SoCs, like the AST2600 which
> should use a different CPU and a different IRQ number layout.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
On Mon, May 6, 2019 at 4:48 PM Philippe Mathieu-Daudé wrote:
> On 5/6/19 4:20 PM, Cédric Le Goater wrote:
> > This will simplify the definition of new SoCs, like the AST2600 which
> > should use a different CPU and a different IRQ number layout.
> >
> > Signed-off-by: Cédric Le Goater
> > ---
> >
Hi Cédric,
On 5/6/19 4:20 PM, Cédric Le Goater wrote:
> This will simplify the definition of new SoCs, like the AST2600 which
> should use a different CPU and a different IRQ number layout.
>
> Signed-off-by: Cédric Le Goater
> ---
>
> Changes since v1:
>
> - moved enum defining the Aspeed c
This will simplify the definition of new SoCs, like the AST2600 which
should use a different CPU and a different IRQ number layout.
Signed-off-by: Cédric Le Goater
---
Changes since v1:
- moved enum defining the Aspeed controller names under aspeed_soc.h
include/hw/arm/aspeed_soc.h | 37 ++
