On 2015-07-18 08:21, Richard Henderson wrote:
> On 07/17/2015 02:42 PM, Aurelien Jarno wrote:
> >On 2015-07-17 12:23, Aurelien Jarno wrote:
> >>On 2015-07-16 22:29, Richard Henderson wrote:
> >>>On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
> While I understand why we need the new trunc_shr_i32
On 07/17/2015 02:42 PM, Aurelien Jarno wrote:
On 2015-07-17 12:23, Aurelien Jarno wrote:
On 2015-07-16 22:29, Richard Henderson wrote:
On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
While I understand why we need the new trunc_shr_i32 opcode for MIPS64
(the 32-bit values must be kept sign-exten
On 2015-07-17 12:23, Aurelien Jarno wrote:
> On 2015-07-16 22:29, Richard Henderson wrote:
> > On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
> > >While I understand why we need the new trunc_shr_i32 opcode for MIPS64
> > >(the 32-bit values must be kept sign-extended), I currently fail to
> > >see
On 2015-07-16 22:29, Richard Henderson wrote:
> On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
> >While I understand why we need the new trunc_shr_i32 opcode for MIPS64
> >(the 32-bit values must be kept sign-extended), I currently fail to
> >see why it is needed for SPARC.
>
> As far as I recall,
On 07/15/2015 09:54 PM, Aurelien Jarno wrote:
While I understand why we need the new trunc_shr_i32 opcode for MIPS64
(the 32-bit values must be kept sign-extended), I currently fail to
see why it is needed for SPARC.
As far as I recall, it improves code for extracting high parts of 64-bit
quan
On 2014-04-24 13:01, Richard Henderson wrote:
>
> Our 32-bit build for sparc has been requiring a 64-bit capable chip
> for about 2 years now, by way of requiring move-conditional and LE
> memory instructions. But we've mostly been generating 32-bit code
> otherwise.
>
> This patch set changes t
Our 32-bit build for sparc has been requiring a 64-bit capable chip
for about 2 years now, by way of requiring move-conditional and LE
memory instructions. But we've mostly been generating 32-bit code
otherwise.
This patch set changes things so that we make full use of the cpu.
The sparcv8plus
