Re: [Qemu-devel] [PATCH v2] target-mips: Implement Loongson 3A processor.

2016-11-30 Thread Richard Henderson
On 11/30/2016 05:46 PM, r...@hev.cc wrote: +static inline void gen_cop2_gslwlrc1(DisasContext *ctx, TCGv base, + int rt, int rs, int offset, int left) +{ +TCGv_i32 t0, t1, t2; + +gen_base_offset_addr(ctx, base, rs, offset); +t1 = tcg_temp_new_i32(); +/* Do

[Qemu-devel] [PATCH v2] target-mips: Implement Loongson 3A processor.

2016-11-30 Thread r
From: Heiher Signed-off-by: Heiher --- target-mips/helper.c | 4 +- target-mips/mips-defs.h | 5 + target-mips/translate.c | 463 +-- target-mips/translate_init.c | 24 +++ 4 files changed, 481 insertions(+), 15 deletions(-) diff -