On 3 October 2013 15:37, Peter Maydell wrote:
> Ah, that means the ARM ARM table is incorrect, because it implies
> that VSEL is conditional (which it definitely isn't). I need to look
> at where the new insns are in the T32/A32 encodings in more
> detail, then, which I don't have time for just at
On 10/03/2013 10:28 AM, Richard Henderson wrote:
> For the simple conditions, yes. For the more complex ones,
> you might want to do the computation in 32-bit and extend
> the result.
Alternately, compute the condition with setcond_i32 and
only extend that result to 64 bits. That means doing
som
On 10/03/2013 08:10 AM, Will Newton wrote:
> No, thanks for picking that up. I was wondering if that was valid and
> the code seemed to work. What's the best way to work around the
> problem? Just extend everything up to 64bits?
For the simple conditions, yes. For the more complex ones,
you might
On 3 October 2013 15:34, Richard Henderson wrote:
> On 10/03/2013 05:51 AM, Will Newton wrote:
>> +case 0: /* eq: Z */
>> +tcg_gen_movcond_i64(TCG_COND_EQ, ftmp3, cpu_ZF,
>> zero,
>> +ftmp1, ftmp2);
>> +
On 10/03/2013 05:51 AM, Will Newton wrote:
> +case 0: /* eq: Z */
> +tcg_gen_movcond_i64(TCG_COND_EQ, ftmp3, cpu_ZF, zero,
> +ftmp1, ftmp2);
> +break;
Does this compile when configured w
On 3 October 2013 23:31, Will Newton wrote:
> On 3 October 2013 13:59, Peter Maydell wrote:
>> This isn't what I meant. If our decoding matches up with the ARM ARM
>> then this instruction pattern should already fall into disas_vfp_insn(),
>> and we shouldn't need an extra check and call. (If it'
On 3 October 2013 13:59, Peter Maydell wrote:
> On 3 October 2013 21:51, Will Newton wrote:
>>
>> This adds support for the VSEL floating point selection instruction
>> which was added in ARMv8. It is based on the previous patch[1] from
>> Mans Rullgard, but attempts to address the feedback given
On 3 October 2013 21:51, Will Newton wrote:
>
> This adds support for the VSEL floating point selection instruction
> which was added in ARMv8. It is based on the previous patch[1] from
> Mans Rullgard, but attempts to address the feedback given on that patch.
>
> [1] http://lists.nongnu.org/archi
This adds support for the VSEL floating point selection instruction
which was added in ARMv8. It is based on the previous patch[1] from
Mans Rullgard, but attempts to address the feedback given on that patch.
[1] http://lists.nongnu.org/archive/html/qemu-devel/2013-06/msg03117.html
Signed-off-by
