Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations

2016-07-11 Thread David Gibson
On Mon, Jul 11, 2016 at 07:30:08PM +0100, Mark Cave-Ayland wrote: 1;4402;0c> On 11/07/16 02:55, David Gibson wrote: > > > On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote: > >> MacOS uses an architecturally illegal MSR combination that > >> seems nonetheless supported by 32-b

Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations

2016-07-11 Thread Mark Cave-Ayland
On 11/07/16 02:55, David Gibson wrote: > On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote: >> MacOS uses an architecturally illegal MSR combination that >> seems nonetheless supported by 32-bit processors, which is >> to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0. >> >

Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations

2016-07-10 Thread David Gibson
On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote: > MacOS uses an architecturally illegal MSR combination that > seems nonetheless supported by 32-bit processors, which is > to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0. > > This adds support for it. To work properly w

Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations

2016-07-09 Thread Mark Cave-Ayland
On 09/07/16 04:42, Benjamin Herrenschmidt wrote: > On Sat, 2016-07-09 at 13:41 +1000, Benjamin Herrenschmidt wrote: >> MacOS uses an architecturally illegal MSR combination that >> seems nonetheless supported by 32-bit processors, which is >> to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0. >

Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations

2016-07-08 Thread Benjamin Herrenschmidt
On Sat, 2016-07-09 at 13:41 +1000, Benjamin Herrenschmidt wrote: > MacOS uses an architecturally illegal MSR combination that > seems nonetheless supported by 32-bit processors, which is > to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0. > > This adds support for it. To work properly we need

[Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations

2016-07-08 Thread Benjamin Herrenschmidt
MacOS uses an architecturally illegal MSR combination that seems nonetheless supported by 32-bit processors, which is to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0. This adds support for it. To work properly we need to also properly include support for PR=1,{I,D}R=0 to the MMU index used by