Patchew URL:
https://patchew.org/QEMU/1565712926-21194-1-git-send-email...@us.ibm.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v2] ppc: Add support for 'mffsl' instruction
Message-id: 1565712926-2
From: "Paul A. Clarke"
ISA 3.0B added a set of Floating-Point Status and Control Register (FPSCR)
instructions: mffsce, mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl.
This patch adds support for 'mffsl'.
'mffsl' is identical to 'mffs', except it only returns mode, status, and enable
bits from th
