On 20 July 2018 at 09:09, Julia Suvorova wrote:
> On 19.07.2018 19:25, Peter Maydell wrote:
>>
>> On 19 July 2018 at 13:16, Julia Suvorova wrote:
>>>
>>> The differences from ARMv7-M NVIC are:
>>>* ARMv6-M only supports up to 32 external interrupts
>>> (configurable feature already). The
On 19.07.2018 19:25, Peter Maydell wrote:
On 19 July 2018 at 13:16, Julia Suvorova wrote:
The differences from ARMv7-M NVIC are:
* ARMv6-M only supports up to 32 external interrupts
(configurable feature already). The ICTR is reserved.
* Active Bit Register is reserved.
* ARMv6-M s
On 19 July 2018 at 13:16, Julia Suvorova wrote:
> The differences from ARMv7-M NVIC are:
> * ARMv6-M only supports up to 32 external interrupts
>(configurable feature already). The ICTR is reserved.
> * Active Bit Register is reserved.
> * ARMv6-M supports 4 priority levels against 256 i
The differences from ARMv7-M NVIC are:
* ARMv6-M only supports up to 32 external interrupts
(configurable feature already). The ICTR is reserved.
* Active Bit Register is reserved.
* ARMv6-M supports 4 priority levels against 256 in ARMv7-M.
Signed-off-by: Julia Suvorova
---
v2:
* Ad
