On 19 October 2013 00:38, Roy Franz wrote:
>Glad to see this go in. Is your target-arm.next branch available
> in a public repo?
No, not generally.
-- PMM
On Fri, Oct 18, 2013 at 7:05 AM, Peter Maydell wrote:
> On 17 October 2013 11:38, Peter Maydell wrote:
>> On 10 July 2013 05:23, wrote:
>>> From: Nathan Rossi
>>>
>>> Added Vector Base Address remapping on ARM v7.
>>
>> Apologies for this dropping off my radar for so long.
>> I've had a bit of
Hi,
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Saturday, October 19, 2013 12:06 AM
> To: Peter Crosthwaite
> Cc: QEMU Developers
> Subject: Re: [PATCH v1 4/4] target-arm: Add CP15 VBAR support
>
> On 17 October 2013 11:38, Peter Maydell wrote:
> >
On 17 October 2013 11:38, Peter Maydell wrote:
> On 10 July 2013 05:23, wrote:
>> From: Nathan Rossi
>>
>> Added Vector Base Address remapping on ARM v7.
>
> Apologies for this dropping off my radar for so long.
> I've had a bit of a think and I think that you're right
> that we can put in this
On 10 July 2013 05:23, wrote:
> From: Nathan Rossi
>
> Added Vector Base Address remapping on ARM v7.
Apologies for this dropping off my radar for so long.
I've had a bit of a think and I think that you're right
that we can put in this register as part of our "random
things we provide even thou
On 2013-09-17 10:37, Peter Maydell wrote:
In any case a new arm_features bit is hardly a big deal: the actual
question is whether it makes sense to provide this register that
shouldn't really exist for the cpu configurations we're modelling.
I use Qemu to run unit tests for a real-time operatin
On 16 September 2013 16:34, Sebastian Huber
wrote:
> it would be really nice to get the CP15 VBAR support integrated. This
> allows unit test suites of single address space real-time systems to catch
> NULL pointer read/write access for example.
I agree it would be useful. As I said, it needs th
On 2013-07-10 06:23, peter.crosthwa...@xilinx.com wrote:
+static int vbar_write(CPUARMState *env, const ARMCPRegInfo *ri,
+ uint64_t value)
+{
+value &= (1 << 31);
Is the above correct?
+env->cp15.c12_vbar = value & ~0x1Ful;
+return 0;
+}
Shouldn't this be
Hello,
it would be really nice to get the CP15 VBAR support integrated. This allows
unit test suites of single address space real-time systems to catch NULL
pointer read/write access for example.
The ARM documentation says that this is a banked register that is only present
in an implementa
Ping!
On Wed, Jul 10, 2013 at 5:38 PM, Peter Maydell wrote:
> On 10 July 2013 05:23, wrote:
>> From: Nathan Rossi
>>
>> Added Vector Base Address remapping on ARM v7.
>
> This is only present on CPUs with TrustZone. On the other
> hand we already implement one or two TZ-only registers
> for pr
On 10 July 2013 05:23, wrote:
> From: Nathan Rossi
>
> Added Vector Base Address remapping on ARM v7.
This is only present on CPUs with TrustZone. On the other
hand we already implement one or two TZ-only registers
for pragmatic get-code-working reasons. I'll try to find
time over the next day
From: Nathan Rossi
Added Vector Base Address remapping on ARM v7.
Signed-off-by: Nathan Rossi
Signed-off-by: Peter Crosthwaite
---
changed since v1:
Removed obsolete VMSD logic (rebase)
Forced lower 5 bits of VBAR ro 0 (PMM review)
Simplified if-else logic to not worry about pre-v7 (PMM review
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