On Wed, Jun 14, 2017 at 12:43:00 -0700, Richard Henderson wrote:
> On 06/14/2017 12:07 PM, Alex Bennée wrote:
> >If your rolling a series for all these can you also pick up Thomas
> >Huth's fix for --accel?
>
> Will do.
Just a heads up since I see the patch is in your tcg-next branch:
Paolo incl
On 06/14/2017 12:07 PM, Alex Bennée wrote:
Richard Henderson writes:
On 06/14/2017 10:08 AM, Paolo Bonzini wrote:
And MIPS:
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 559f8fed89..244f3cb9ab 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1340
On 06/14/2017 12:11 PM, Peter Maydell wrote:
On 14 June 2017 at 18:49, Alex Bennée wrote:
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 2a85666579..7e67bb3db2 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -835,6 +835,9 @@ void HELPER(msr_i_pstate)(CPUA
On 14 June 2017 at 18:49, Alex Bennée wrote:
> diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
> index 2a85666579..7e67bb3db2 100644
> --- a/target/arm/op_helper.c
> +++ b/target/arm/op_helper.c
> @@ -835,6 +835,9 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op,
> uint32_t
Richard Henderson writes:
> On 06/14/2017 10:08 AM, Paolo Bonzini wrote:
>> And MIPS:
>>
>> diff --git a/target/mips/translate.c b/target/mips/translate.c
>> index 559f8fed89..244f3cb9ab 100644
>> --- a/target/mips/translate.c
>> +++ b/target/mips/translate.c
>> @@ -13403,8 +13403,9 @@ static vo
On 06/14/2017 10:08 AM, Paolo Bonzini wrote:
And MIPS:
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 559f8fed89..244f3cb9ab 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -13403,8 +13403,9 @@ static void gen_pool32axf (CPUMIPSState *env,
DisasContex
On 06/14/2017 10:49 AM, Alex Bennée wrote:
I think this is a band-aid, and would rather fix the front-ends as in
Emilio's patch.
It seems a shame to cause all msr accesses to trigger and exit when we
only care about the unmasking case. How about:
Author: Alex Bennée
Date: Wed Jun 14 18:46:
Paolo Bonzini writes:
> On 14/06/2017 17:45, Richard Henderson wrote:
>> While the next TB would detect the exit flag has been set there is no
>> point if we can exit sooner. We also check cpu->interrupt_request as
>> some front-ends can set it rather than using the cpu_interrupt() API
>> call a
On 14/06/2017 18:51, Richard Henderson wrote:
> On 06/14/2017 09:08 AM, Paolo Bonzini wrote:
>> I think this is a band-aid, and would rather fix the front-ends as in
>> Emilio's patch. For Alpha my guess would be:
>>
>> diff --git a/target/alpha/translate.c b/target/alpha/translate.c
>> index 7c45
On 06/14/2017 09:08 AM, Paolo Bonzini wrote:
I think this is a band-aid, and would rather fix the front-ends as in
Emilio's patch. For Alpha my guess would be:
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 7c45ae360c..6e2ee3f958 100644
--- a/target/alpha/translate.c
+++
On 14/06/2017 17:45, Richard Henderson wrote:
> While the next TB would detect the exit flag has been set there is no
> point if we can exit sooner. We also check cpu->interrupt_request as
> some front-ends can set it rather than using the cpu_interrupt() API
> call and would normally be expectin
On 06/14/2017 07:02 AM, Alex Bennée wrote:
While the next TB would detect the exit flag has been set there is no
point if we can exit sooner. We also check cpu->interrupt_request as
some front-ends can set it rather than using the cpu_interrupt() API
call and would normally be expecting the IRQ t
While the next TB would detect the exit flag has been set there is no
point if we can exit sooner. We also check cpu->interrupt_request as
some front-ends can set it rather than using the cpu_interrupt() API
call and would normally be expecting the IRQ to get picked up on the
previously fairly regu
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